Chinese researchers are pushing deep ultraviolet (DUV) lithography tools into sub-3nm territory.
Researchers in China have developed an early-stage process for constructing gate-all-around (GAA) transistors at the sub-3nm level using DUV lithography. This technology remains in the initial stages of development and has not yet proven capable of supporting commercial-scale production.
GAA architecture could help overcome lithography limits
The research focuses on GAA transistors, an architecture currently replacing FinFET designs as manufacturers transition toward smaller process nodes. Unlike FinFETs, where the gate surrounds the transistor channel on three sides, GAA designs wrap the gate entirely around the channel, offering superior control over current flow. Export restrictions prevent ASML from selling EUV systems to Chinese customers; consequently, Chinese semiconductor researchers have increasingly explored methods to extract greater performance from older DUV equipment through new transistor structures, process techniques, and materials.
CAS has been working on several components of this challenge. In 2025, researchers at the institute developed an all-solid-state DUV laser capable of producing 193nm coherent light, which is the wavelength utilized by advanced DUV lithography systems. Furthermore, researchers are investigating whether alternative device architectures and process techniques can compensate for existing lithography limitations.
China’s semiconductor industry is pursuing several parallel strategies. In 2026, Huawei unveiled the Tau Scaling Law, a chip-design approach based on “time scaling” that the company claims could eventually produce transistor densities comparable to a 1.4nm process by 2031.
